/*

  * Project Frontplatte

  *

  * io_cfg.h  -  Pinmappings and naming

  *

  * This file is released under the GNU General Public License. Refer

  * to the COPYING file distributed with this package.

  *

  * (c) 2007 Carsten Presser cpresser AT fsing.uni-sb.de

  */

 #ifndef IO_CFG_H

 #define IO_CFG_H

 #define FW_VERSION					0x05

 /** U S B ***********************************************************/

 #define usb_bus_sense       	1

 #define self_power          	1

 /** P O R T A  P I N S *********************************************/

 // PortA is not used yet...

 /** P O R T B  P I N S *********************************************/

 //								RB0 & RB1 -> I2C (MSSP-Module)

 #define PIN_IR					PORTBbits.RB2

 #define PIN_POWER				LATBbits.LATB3

 #define PIN_I2C_INT				PORTBbits.RB4

 //								RB5 has no connection

 //								RB6 & RB7 -> ISCP

 #define DDR_I2C_SCL				DDRBbits.RB1

 #define DDR_I2C_SDA				DDRBbits.RB0

 #define DDR_IR					DDRBbits.RB2

 #define DDR_I2C_INT				DDRBbits.RB4

 #define	mInitPortB				TRISB = 0x00; LATB = 0xFF; 

 /** P O R T C  P I N S *********************************************/

 #define PIN_BOOT_SW				PORTCbits.RC0

 #define DDR_BOOT_SW				DDRCbits.RC0

 #define DDR_PWM1				DDRCbits.RC1

 #define DDR_PWM2				DDRCbits.RC2

 //								RC3 -> not implemented in hardware

 //								RC4 & RC5 -> USB

 //								RC6 has no connection

 //								RC7 has no connection

 /** P O R T D  &  P O R T E   P I N S  ( D I S P L A Y ) ************/

 // control pins.

 #define	D_WR			LATEbits.LATE0

 #define	D_RD			LATEbits.LATE1

 #define	D_CD			LATEbits.LATE2

 #define	mLcdInitCtrl()			D_WR = 1; D_RD = 1; D_CD = 0; TRISE = 0x00;

 #define mLcdDataDirIn()			TRISD=0xFF

 #define mLcdDataDirOut() 		TRISD=0x00

 #define mLcdWriteData(a)		PORTD=(a)		

 #define mLcdReadData()			PORTD		

 /** S O M E   F L A G S *********************************************/

 #define FLAG_I2C			0x20

 #define FLAG_COUNTER		0x10

 #define FLAG_POWER			0x08

 #define FLAG_ALARM			0x04

 #define FLAG_IR				0x02

 #define FLAG_KEY			0x01

 #define FLAG_CLEAR			0x00

 #define MODE_MANAGED		0x01

 #define MODE_UNMANAGED		0x00

 /** I 2 C - A D D R E S S *******************************************/

 #define	pcf8583				0xA0

 #define pcf8574A_1			0x40

 #define	pcf8574A_2			0x42

 /** P C F 8 5 8 3   R E G I S T E R *********************************/

 #define CLK_CTRL			0x00

 #define CLK_HUNDRSEC		0x01

 #define CLK_SEC				0x02

 #define CLK_MIN				0x03

 #define CLK_HOURS			0x04

 #define CLK_YEARDAY			0x05

 #define CLK_WEEKDMON		0x06

 #define CLK_TIMER			0x07

 #define CLK_ALARM_CTRL		0x08

 /** C O M M U N I C A T I O N ***************************************/

 // address

 #define CMD_HD_SYNC		0x00

 #define CMD_HD_COMMAND	0x01

 #define CMD_HD_LENGTH	0x02

 #define CMD_DATA_START	0x04

 // sync words

 #define CMD_SYNC_SEND	0xAA

 #define CMD_SYNC_RECV	0x55

 // commands

 #define CMD_SYS_SYNC	0x00

 #define CMD_SYS_ACK		0x01		

 #define CMD_SYS_NACK	0x02

 #define CMD_SYS_NIMP	0xFF

 #define CMD_SYS_IR		0x10

 #define CMD_GET_VERSION				0x01

 #define CMD_DISP_CLEAR_SCREEN		0x10

 #define CMD_DISP_SET_ROW_DATA   	0x14

 #define CMD_DISP_SET_ADDRESS		0x16

 #define CMD_WRITE_EEPROM			0x20

 #define CMD_READ_EEPROM				0x21

 #define CMD_READ_CLOCK				0x40

 #define CMD_WRITE_CLOCK				0x41

 #define CMD_SET_PWM1				0x45

 #define CMD_SET_PWM2				0x46

 #define CMD_SET_MODE_MANAGED		0x70

 #define CMD_SET_MODE_UNMANAGED		0x71

 #define CMD_BOOT					0x80

 // rc5 keymap

 #define RC5_KEY_UP					0x20

 #define RC5_KEY_DOWN				0x21

 #define RC5_KEY_LEFT				0x11

 #define RC5_KEY_RIGHT				0x10

 #define RC5_KEY_OK					0x0E

 #define RC5_KEY_MENU				0x12

 #define RC5_KEY_BACK				0x22

 #define RC5_KEY_RED					0x37

 #define RC5_KEY_GREEN				0x36

 #define RC5_KEY_YELLOW				0x32

 #define RC5_KEY_BLUE				0x34

 #define RC5_KEY_POWER				0x0C

 #define RC5_FRONT_ADDRESS			0x20

 /** E E P R O M   L O C A T I O N S *********************************/

 #define EE_ADDR_DISPLAY				0x00

 #define EE_ADDR_FEATURES			0x01

 #define EE_ADDR_RC5KEY00			0x10

 #define EE_ADDR_RC5KEY01			0x11

 #define EE_ADDR_RC5KEY02			0x12

 #define EE_ADDR_RC5KEY03			0x13

 #define EE_ADDR_RC5KEY04			0x14

 #define EE_ADDR_RC5KEY05			0x15

 #define EE_ADDR_RC5KEY06			0x16

 #define EE_ADDR_RC5KEY07			0x17

 #define EE_ADDR_RC5KEY08			0x18

 #define EE_ADDR_RC5KEY09 			0x19

 #define EE_ADDR_RC5KEY10			0x1a

 #define EE_ADDR_RC5KEY11			0x1b

 #define EE_ADDR_RC5KEY12			0x1c

 #define EE_ADDR_RC5KEY13			0x1d

 #define EE_ADDR_RC5KEY14			0x1e

 #define EE_ADDR_RC5KEY15			0x1f

 /** P R O G R A M   L O C A T I O N *********************************/

 #define BOOTLOAD_START		0x000686		// taken from bootload.asm

 #endif //IO_CFG_H