picctl: firmware/rc5.c@7a0c4b0354ba

     1 /*

     2  * Project Frontplatte

     3  *

     4  * rc5.c  -  decode rc5 signals

     5  *

     6  * This file is released under the GNU General Public License. Refer

     7  * to the COPYING file distributed with this package.

     8  *

     9  * (c) 2007 Carsten Presser cpresser AT fsing.uni-sb.de

    10  */

    12 #include <p18cxxx.h>

    13 #include "rc5.h"

    14 #include "io_cfg.h"

    15 #include "delay.h"

    16 #include "user.h"

    18 #include <timers.h>

    20 /** V A R I A B L E S **********************************************/

    21 unsigned char rc5_status;

    22 unsigned int  rc5_receive_buffer;

    23 unsigned char gg_ir;

    24 unsigned char gg_ir_address;

    26 /** C O D E ********************************************************/

    27 void rc5_init(void)

    28 {

    29 	OpenTimer0(TIMER_INT_ON & T0_8BIT & T0_SOURCE_INT & T0_PS_1_256);

    30 	// SOLLTE SEIN: ein Timer Takt = 51,2 E-6 sec. (mit prescaler 256)

    31 	// ist aber 25,6usec [woher kommt das 1/2??]

    33 /*	kurze pulsdauer: 		444us	bis		1333us		mitte:	889us

    34 	entspricht in timer0:	17,3			52,0				34,7

    36 	lange pulsdauer:		1334us	bis		2222us				1778us

    37 	in timer0:				52,1			87					69,5*/

    39 	INTCONbits.TMR0IF	= 0;	// clear flag

    40 	INTCON2bits.TMR0IP	= 1;	// make TMR0 a high-priority-interrupt

    42 	rc5_receive_buffer	= 0x0000;

    43 	gg_ir_address		= 0xFF;

    44 	gg_ir 				= 0xFF;

    45 	rc5_status			= RC5_UNDEF;

    46 }

    48 void rc5_decode(void)

    49 {

    50 	unsigned char tmr0;

    51 	unsigned char pulse = 0xFF;

    53 /* G E T   P U L S E W I D T H   &  T Y P E */

    54 	tmr0 = (unsigned char)(ReadTimer0());

    55 	// decide if this is long or short...

    56 	if ((tmr0 > 20) && (tmr0 < 49)) {pulse = RC5_SPACE_SHORT;}

    57 	if ((tmr0 > 55) && (tmr0 < 82)) {pulse = RC5_SPACE_LONG;}

    59 	// if RB0 = 1 -> this is a space, not a pulse -> add one

    60 	pulse += PIN_IR;

    62 /* S T A T U S    M A C H I N E */

    63 	switch (rc5_status)

    64 	{

    65 		case RC5_MID1:

    66 			if (pulse == RC5_PULSE_SHORT)

    67 			{

    68 				rc5_status = RC5_START1;

    69 			}

    70 			else if (pulse == RC5_PULSE_LONG)

    71 			{

    72 				rc5_status = RC5_MID0;

    73 				rc5_receive_buffer = rc5_receive_buffer << 1;		// emit zero

    74 			}

    75 			else

    76 				rc5_scrap();

    77 			break;

    79 		case RC5_MID0:

    80 			if (pulse == RC5_SPACE_SHORT)

    81 			{

    82 				rc5_status = RC5_START0;

    83 			}

    84 			else if (pulse == RC5_SPACE_LONG)

    85 			{

    86 				rc5_status = RC5_MID1;

    87 				rc5_receive_buffer = rc5_receive_buffer << 1;

    88 				rc5_receive_buffer |= 0x01;							// emit one

    89 			}

    90 			else

    91 				rc5_scrap();

    92 			break;

    94 		case RC5_START1:

    95 			if (pulse == RC5_SPACE_SHORT)

    96 			{

    97 				rc5_status = RC5_MID1;

    98 				rc5_receive_buffer = rc5_receive_buffer << 1;

    99 				rc5_receive_buffer |= 0x01;							// emit one

   100 			}

   101 			else

   102 				rc5_scrap();

   103 			break;

   105 		case RC5_START0:

   106 			if (pulse == RC5_PULSE_SHORT)

   107 			{

   108 				rc5_status = RC5_MID0;

   109 				rc5_receive_buffer = rc5_receive_buffer << 1;		// emit zero

   110 			}

   111 			else

   112 				rc5_scrap();

   113 			break;

   115 		case RC5_DONE:

   116 		case RC5_UNDEF:

   117 		default:

   118 			rc5_scrap();

   119 			break;

   120 	}

   122 	// i recieved 13 + startbit bits...

   123 	if (rc5_receive_buffer & 0x6000)

   124 	{

   125 		rc5_status = RC5_DONE;

   126 		gg_ir 			= (unsigned char)(rc5_receive_buffer & 0x3F);			// lower 6 bits -> command

   127 		gg_ir_address	= (unsigned char)((rc5_receive_buffer & 0x032) >> 6);	// upper 6 bits -> address + toogle

   129 		gg_ioflags		|= FLAG_IR;

   130 	}

   132 	// reset timer and wait for next pulse....

   133 	WriteTimer0(0x00);

   134 }

   137 void rc5_scrap(void)

   138 {

   139 	// enter start-state and emit one

   140 	rc5_status = RC5_MID1;

   141 	rc5_receive_buffer = 0x0001;

   142 }

author	root@rika
	Thu, 23 Apr 2009 20:55:41 +0200
changeset 33	7a0c4b0354ba
parent 2	2f55e5dd591d
permissions	-rw-r--r--