|
1 /* |
|
2 * Project Frontplatte |
|
3 * |
|
4 * io_cfg.h - Pinmappings and naming |
|
5 * |
|
6 * This file is released under the GNU General Public License. Refer |
|
7 * to the COPYING file distributed with this package. |
|
8 * |
|
9 * (c) 2007 Carsten Presser cpresser AT fsing.uni-sb.de |
|
10 */ |
|
11 |
|
12 #ifndef IO_CFG_H |
|
13 #define IO_CFG_H |
|
14 |
|
15 #define FW_VERSION 0x04 |
|
16 |
|
17 /** U S B ***********************************************************/ |
|
18 #define usb_bus_sense 1 |
|
19 #define self_power 1 |
|
20 |
|
21 |
|
22 /** P O R T A P I N S *********************************************/ |
|
23 // PortA is not used yet... |
|
24 |
|
25 |
|
26 /** P O R T B P I N S *********************************************/ |
|
27 // RB0 & RB1 -> I2C (MSSP-Module) |
|
28 #define PIN_IR PORTBbits.RB2 |
|
29 #define PIN_POWER LATBbits.LATB3 |
|
30 #define PIN_I2C_INT PORTBbits.RB4 |
|
31 // RB5 has no connection |
|
32 // RB6 & RB7 -> ISCP |
|
33 |
|
34 #define DDR_I2C_SCL DDRBbits.RB1 |
|
35 #define DDR_I2C_SDA DDRBbits.RB0 |
|
36 #define DDR_IR DDRBbits.RB2 |
|
37 #define DDR_I2C_INT DDRBbits.RB4 |
|
38 |
|
39 #define mInitPortB TRISB = 0x00; LATB = 0xFF; |
|
40 |
|
41 |
|
42 /** P O R T C P I N S *********************************************/ |
|
43 #define PIN_BOOT_SW PORTCbits.RC0 |
|
44 #define DDR_BOOT_SW DDRCbits.RC0 |
|
45 |
|
46 #define DDR_PWM1 DDRCbits.RC1 |
|
47 #define DDR_PWM2 DDRCbits.RC2 |
|
48 // RC3 -> not implemented in hardware |
|
49 // RC4 & RC5 -> USB |
|
50 // RC6 has no connection |
|
51 // RC7 has no connection |
|
52 |
|
53 |
|
54 /** P O R T D & P O R T E P I N S ( D I S P L A Y ) ************/ |
|
55 // control pins. |
|
56 #define D_WR LATEbits.LATE0 |
|
57 #define D_RD LATEbits.LATE1 |
|
58 #define D_CD LATEbits.LATE2 |
|
59 |
|
60 #define mLcdInitCtrl() D_WR = 1; D_RD = 1; D_CD = 0; TRISE = 0x00; |
|
61 |
|
62 #define mLcdDataDirIn() TRISD=0xFF |
|
63 #define mLcdDataDirOut() TRISD=0x00 |
|
64 #define mLcdWriteData(a) PORTD=(a) |
|
65 #define mLcdReadData() PORTD |
|
66 |
|
67 |
|
68 /** S O M E F L A G S *********************************************/ |
|
69 #define FLAG_I2C 0x20 |
|
70 #define FLAG_COUNTER 0x10 |
|
71 #define FLAG_POWER 0x08 |
|
72 #define FLAG_ALARM 0x04 |
|
73 #define FLAG_IR 0x02 |
|
74 #define FLAG_KEY 0x01 |
|
75 #define FLAG_CLEAR 0x00 |
|
76 |
|
77 #define MODE_MANAGED 0x01 |
|
78 #define MODE_UNMANAGED 0x00 |
|
79 |
|
80 |
|
81 /** I 2 C - A D D R E S S *******************************************/ |
|
82 #define pcf8583 0xA0 |
|
83 #define pcf8574A_1 0x40 |
|
84 #define pcf8574A_2 0x42 |
|
85 |
|
86 /** P C F 8 5 8 3 R E G I S T E R *********************************/ |
|
87 #define CLK_CTRL 0x00 |
|
88 #define CLK_HUNDRSEC 0x01 |
|
89 #define CLK_SEC 0x02 |
|
90 #define CLK_MIN 0x03 |
|
91 #define CLK_HOURS 0x04 |
|
92 #define CLK_YEARDAY 0x05 |
|
93 #define CLK_WEEKDMON 0x06 |
|
94 #define CLK_TIMER 0x07 |
|
95 #define CLK_ALARM_CTRL 0x08 |
|
96 |
|
97 |
|
98 /** C O M M U N I C A T I O N ***************************************/ |
|
99 // address |
|
100 #define CMD_HD_SYNC 0x00 |
|
101 #define CMD_HD_COMMAND 0x01 |
|
102 #define CMD_HD_LENGTH 0x02 |
|
103 #define CMD_DATA_START 0x04 |
|
104 |
|
105 // sync words |
|
106 #define CMD_SYNC_SEND 0xAA |
|
107 #define CMD_SYNC_RECV 0x55 |
|
108 |
|
109 // commands |
|
110 #define CMD_SYS_SYNC 0x00 |
|
111 #define CMD_SYS_ACK 0x01 |
|
112 #define CMD_SYS_NACK 0x02 |
|
113 #define CMD_SYS_NIMP 0xFF |
|
114 #define CMD_SYS_IR 0x10 |
|
115 |
|
116 #define CMD_GET_VERSION 0x01 |
|
117 |
|
118 #define CMD_DISP_CLEAR_SCREEN 0x10 |
|
119 #define CMD_DISP_SET_ROW_DATA 0x14 |
|
120 #define CMD_DISP_SET_ADDRESS 0x16 |
|
121 |
|
122 #define CMD_READ_CLOCK 0x40 |
|
123 #define CMD_WRITE_CLOCK 0x41 |
|
124 #define CMD_SET_PWM1 0x45 |
|
125 #define CMD_SET_PWM2 0x46 |
|
126 |
|
127 #define CMD_SET_MODE_MANAGED 0x70 |
|
128 #define CMD_SET_MODE_UNMANAGED 0x71 |
|
129 |
|
130 #define CMD_BOOT 0x80 |
|
131 |
|
132 // rc5 keymap |
|
133 #define RC5_KEY_UP 0x20 |
|
134 #define RC5_KEY_DOWN 0x21 |
|
135 #define RC5_KEY_LEFT 0x11 |
|
136 #define RC5_KEY_RIGHT 0x10 |
|
137 #define RC5_KEY_OK 0x0E |
|
138 #define RC5_KEY_MENU 0x12 |
|
139 #define RC5_KEY_BACK 0x22 |
|
140 #define RC5_KEY_RED 0x37 |
|
141 #define RC5_KEY_GREEN 0x36 |
|
142 #define RC5_KEY_YELLOW 0x32 |
|
143 #define RC5_KEY_BLUE 0x34 |
|
144 #define RC5_KEY_POWER 0x0C |
|
145 |
|
146 #define RC5_FRONT_ADDRESS 0x55 |
|
147 |
|
148 |
|
149 |
|
150 /** P R O G R A M L O C A T I O N *********************************/ |
|
151 #define BOOTLOAD_START 0x000686 // taken from bootload.asm |
|
152 |
|
153 #endif //IO_CFG_H |